1. Field Of The Invention
The present invention relates generally to interconnect structures for integrated circuits and, more particularly, to a local interconnect manufactured with fewer mask steps for random access memory circuits.
2. Background Of The Related Art
Random access memories, in both dynamic (DRAM) and static (SRAM) forms, are complex integrated circuits that have become commodity items in the electronics industry. Despite their complexity, price competition requires that memory designs be inexpensive to manufacture while at the same time maintaining high performance and high reliability. For example, it can be a significant advantage if a memory design can eliminate one or more processing steps. In particular, many integrated circuits use multiple layers of patterned metallization to provide interconnect wiring between devices. Each layer of metallization increases cost significantly while creating additional reliability concerns created by the additional processing. Hence, it is typically desirable to minimize the number metallization layers required to implement a design.
The present invention may be directed to one or more of the problems set forth above.